7 #ifndef __MSP430WARE_USCI_A_UART_H__
8 #define __MSP430WARE_USCI_A_UART_H__
12 #ifdef __MSP430_HAS_USCI_Ax__
31 #define DEFAULT_SYNC 0x00
32 #define USCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
39 typedef struct USCI_A_UART_initParam {
44 uint8_t selectClockSource;
46 uint16_t clockPrescalar;
65 uint8_t msborLsbFirst;
70 uint8_t numberofStopBits;
83 } USCI_A_UART_initParam;
92 #define USCI_A_UART_NO_PARITY 0x00
93 #define USCI_A_UART_ODD_PARITY 0x01
94 #define USCI_A_UART_EVEN_PARITY 0x02
102 #define USCI_A_UART_MSB_FIRST UCMSB
103 #define USCI_A_UART_LSB_FIRST 0x00
111 #define USCI_A_UART_MODE UCMODE_0
112 #define USCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1
113 #define USCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2
114 #define USCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3
122 #define USCI_A_UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
123 #define USCI_A_UART_CLOCKSOURCE_ACLK UCSSEL__ACLK
131 #define USCI_A_UART_ONE_STOP_BIT 0x00
132 #define USCI_A_UART_TWO_STOP_BITS UCSPB
140 #define USCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
141 #define USCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
150 #define USCI_A_UART_RECEIVE_INTERRUPT UCRXIE
151 #define USCI_A_UART_TRANSMIT_INTERRUPT UCTXIE
152 #define USCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE
153 #define USCI_A_UART_BREAKCHAR_INTERRUPT UCBRKIE
163 #define USCI_A_UART_RECEIVE_INTERRUPT_FLAG UCRXIFG
164 #define USCI_A_UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG
173 #define USCI_A_UART_LISTEN_ENABLE UCLISTEN
174 #define USCI_A_UART_FRAMING_ERROR UCFE
175 #define USCI_A_UART_OVERRUN_ERROR UCOE
176 #define USCI_A_UART_PARITY_ERROR UCPE
177 #define USCI_A_UART_BREAK_DETECT UCBRK
178 #define USCI_A_UART_RECEIVE_ERROR UCRXERR
179 #define USCI_A_UART_ADDRESS_RECEIVED UCADDR
180 #define USCI_A_UART_IDLELINE UCIDLE
181 #define USCI_A_UART_BUSY UCBUSY
214 extern bool USCI_A_UART_init(uint16_t baseAddress,
215 USCI_A_UART_initParam *
param);
232 extern void USCI_A_UART_transmitData(uint16_t baseAddress,
249 extern uint8_t USCI_A_UART_receiveData(uint16_t baseAddress);
275 extern void USCI_A_UART_enableInterrupt(uint16_t baseAddress,
301 extern void USCI_A_UART_disableInterrupt(uint16_t baseAddress,
325 extern uint8_t USCI_A_UART_getInterruptStatus(uint16_t baseAddress,
347 extern void USCI_A_UART_clearInterrupt(uint16_t baseAddress,
363 extern void USCI_A_UART_enable(uint16_t baseAddress);
378 extern void USCI_A_UART_disable(uint16_t baseAddress);
414 extern uint8_t USCI_A_UART_queryStatusFlags(uint16_t baseAddress,
432 extern void USCI_A_UART_setDormant(uint16_t baseAddress);
447 extern void USCI_A_UART_resetDormant(uint16_t baseAddress);
462 extern void USCI_A_UART_transmitAddress(uint16_t baseAddress,
483 extern void USCI_A_UART_transmitBreak(uint16_t baseAddress);
497 extern uint32_t USCI_A_UART_getReceiveBufferAddressForDMA(uint16_t baseAddress);
511 extern uint32_t USCI_A_UART_getTransmitBufferAddressForDMA(uint16_t baseAddress);
MPU_initThreeSegmentsParam param